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Dataflow dot product on networks of heterogeneous digit-serial arithmetic units

Abstract : In this paper we deal with a new high precision computation of the dot product. The key idea is to use hundreds of digit-serial arithmetic units that allow a massive digit-level pipelining. Parallel discrete-event simulations performed on a memory-distributed massively parallel computer show that with a limited number of arithmetic units, the computation of dot product when performed using a ``classical'' algorithmic technique (i.e. serial cumulative multiplications) is almost as fast as the case where an ``optimal'' divide-and-conquer algorithmic technique is used. Interconnection networks for both algorithmic techniques are considered.
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Submitted on : Wednesday, April 17, 2019 - 9:13:19 AM
Last modification on : Saturday, September 11, 2021 - 3:19:11 AM


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  • HAL Id : hal-02102063, version 1



Jean Duprat, Mario Fiallos-Aguilar. Dataflow dot product on networks of heterogeneous digit-serial arithmetic units. [Research Report] LIP RR-1993-10, Laboratoire de l'informatique du parallélisme. 1993, 2+17p. ⟨hal-02102063⟩



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