Signed-digit number representations for fast parallel arithmetic, IRE Transactions on Electronic Computers, vol.10, pp.389-400, 1961. ,
DOI : 10.1109/tec.1961.5219227
Evaluation de fonctions dans des Syst emes Redondantes d'ecriture des Nombres, 1993. ,
On-line power series, International Conference on Signal Processing Applications and Technology, 1992. ,
Adapting a simulation language to a distributed environment, 3rd International conference on distributed c omputing system, pages 596{603, 1983. ,
Ecient matrix multiplication on simd computers, SIAM Journal of Matrix Anal. Appl, vol.13, issue.1, pp.386-401, 1992. ,
A novel algorithm for discrete-event s i m ulation, IEEE Computer, pp.21-33, 1991. ,
On the simulation of pipelining of fully digit on-line oating-point adder networks on massively parallel computers, Second Joint Conference o n V ector and Parallel Processing, pp.707-712, 1992. ,
Delays of on-line oating-point operators in borrow s a ve notation, Algorithms and Parallel VLSI Architectures II, pp.273-278, 1991. ,
Some operators for radix 2 on-line computations, Journal of Parallel and Distributed Computing. T o Appear ,
On-line arithmetic: an overview, SPIE, editor, SPIE, Real Time Signal Processing VII, pp.86-93, 1984. ,
On-line algorithms for division and multiplication, IEEE Trans. Comp., C, vol.26, issue.7, pp.681-687, 1977. ,
Structure of a distributed simulation system, 3rd International conference on distributed c omputing systems, pp.584-589, 1983. ,
Parallel discrete event simulation, Communications of the ACM, vol.33, issue.10, pp.28-53, 1990. ,
Janus, an on-line multiplier/divider for manipulating large numbers, 9th Symposium on Computer Arithmetic, pp.106-111, 1989. ,
URL : https://hal.archives-ouvertes.fr/hal-00014975
The binary tree as an interconnection network: Applications to multiprocessor systems and vlsi, IEEE Transactions on Computers, c, vol.30, issue.4, pp.247-253, 1981. ,
Partitioned matrix algorithms for vlsi arithmetic systems, IEEE Transactions on computers, c-31, issue.12, pp.1215-1224, 1982. ,
A family of new eecient a r r a ys for matrix multiplication, IEEE Transactions on computers, vol.38, issue.1, pp.149-155, 1989. ,
Virtual time, ACM Transactions on Programming Languages and Systems, vol.7, issue.3, pp.404-425, 1985. ,
Simulation of doom, a loosely coupled multiprocessor system, 1987. ,
Distributed simulation using a network of processors, Computer Networks, vol.3, pp.44-56, 1979. ,
Pipelined data-parallel algorithms: Part 2 -design, IEEE Transactions on Parallel and Distributed Systems, vol.1, issue.4, pp.487-499, 1990. ,
DOI : 10.1109/71.80176
Pipelined data-parallel algorithms: Part1 -concept and modeling, IEEE Transactions on Parallel and Distributed Systems, vol.1, issue.4, pp.471-485, 1990. ,
DOI : 10.1145/55364.55402
Fast hardware units for the computation of accurate dot products, 10th Symposium on Computer Arithmetic. IEEE, 1991. ,
Time, clocks, and the ordering of events in a distributed system, Communications of the ACM, vol.21, issue.7, pp.559-565, 1978. ,
, MasPar Computer Corporation. MasPar Parallel Application Language(MPL) -User Guide, 1991.
Distributed discrete-event simulation, Computer Surveys, vol.18, issue.1, pp.39-65, 1986. ,
DOI : 10.1145/6462.6485
Faut-il faire connance aux ordinateurs?, 1990. ,
Arithmetique des Ordinateurs, 1989. ,
URL : https://hal.archives-ouvertes.fr/ensl-00086707
The design of the maspar mp-1: A cost eeective massively parallel computer, IEEE, pp.25-28, 1990. ,
The winsconsin wind tunnel: Virtual prototyping of parallel computers, ACM SIGMETRICS Conference, 1993. ,
Design and Simulation of an MIMD Shared memory multiprocessor with interleaved instruction streams, 1991. ,
On-line Arithmetic Algorithms for EEcient Implementation, 1990. ,