Parallel Execution of the Saturated Reductions

Abstract : This report addresses the problem of improving the execution performance of saturated reduction loops on fixed-point instruction-level parallel Digital Signal Processors (DSPs). We first introduce ``bit-exact'' transformations, that are suitable for use in the ETSI and the ITU speech coding applications. We then present ``approximate'' transformations, the relative precision of which we are able to compare. Our main results rely on the properties of the saturated arithmetic.
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https://hal-lara.archives-ouvertes.fr/hal-02101824
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Submitted on : Wednesday, April 17, 2019 - 9:07:15 AM
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Benoît Dupont de Dinechin, Christophe Monat, Fabrice Rastello. Parallel Execution of the Saturated Reductions. [Research Report] LIP RR-2001-28, Laboratoire de l'informatique du parallélisme. 2001, 2+15p. ⟨hal-02101824⟩

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