Modeling Multiple cell upset MCU SRAM RSA Delay testing Through-silicon vias Delays Soft errors Education Low power Microprocessors Software Switches Sensors Fault modeling Embedded systems Clocks Single event upset SEU Random access memory Testing SEU Registers MRAM Variability BIST Memory device Logic gates Hardware Trojan Cryptographie Fault attacks Ring oscillators Soft Errors Cross-section Single Event Upset DPA Accelerometers Transistors Integrated circuit testing Computer architecture Crosstalk Integrated circuit modeling Accelerometer Fiabilité Logic testing MEMS AES Core-cell Security Simulation Magnetic tunneling ATPG Automatic test pattern generation Heavy ions Reliability Integrated circuit interconnections CMOS integrated circuits Test Heating Circuit faults Flip-flops Design space exploration Soft Error Rate Power demand Libraries Failure analysis Hardware Memory test FPGA Thermal sensor Monitoring Countermeasures DFT Transient faults Neutron Diagnostic Design Power consumption Neutrons Robustness Integrated circuit design VLSI Analytical models CMOS Cryptography Testability Calibration SoC Electromagnetic Analysis Side-Channel Attacks Cross section Low-power design Protons SER Silicon Radiation Fault injection Atmospheric neutrons Field programmable gate arrays Fault tolerance Memories